Parameterizable VLSI-Based Digital Clock with Alarm Functionality featuring real-time HH:MM:SS timekeeping, alarm scheduling, snooze support, 12/24-hour operation, debounced inputs, FSM-driven control architecture, seven-segment display interfacing, comprehensive waveform verification, and FPGA-ready RTL development workflow.
fsm fpga electronics embedded-systems verilog finite-state-machine alarm-clock systemverilog icarus-verilog gtkwave vlsi verilog-hdl digital-clock digital-design clock-design alarm-system seven-segment-display rtl-design hardware-design waveform-verification
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Updated
Jun 22, 2026 - Verilog