[Fix][TIRx] Handle vector access pointer addresses in C codegen - #20058
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tlopex wants to merge 1 commit into
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[Fix][TIRx] Handle vector access pointer addresses in C codegen#20058tlopex wants to merge 1 commit into
tlopex wants to merge 1 commit into
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Treat a Ramp-indexed BufferLoad passed to address_of as the address of its first lane, matching LLVM codegen. Keep vector access pointer lowering in scalar element units so padded and packed vector dtypes retain their existing semantics.
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This PR fixes invalid pointer arithmetic emitted by C-family codegen for vector-typed
tvm_access_ptr.A vector access pointer is lowered to
address_of(BufferLoad(...))with aRampindex describing its lane indices. For example,Ramp(4, 1, 2)represents scalar elements[4, 5], so its address should be the address of the first lane,&A[4].LLVM codegen already extracts
Ramp::basein this case. However,CodeGenCpreviously passed the complete ramp to pointer arithmetic, which could generate invalid CUDA code such as:This PR makes
CodeGenCuseRamp::basewhen generating the address of a vectorBufferLoad. The normalized index is applied to both the direct pointer-offset path and the generalGetBufferRefpath.The existing scalar-buffer plus
Ramplowering is preserved. This avoids regressions for padded vector types such asfloat32x3and packed vector types such asint4x4, while making C-family codegen consistent with LLVM codegen.Regression tests cover:
float32x2C codegen.float32x3LLVM codegen.int4x4CUDA codegen.